Speaker:
Karan Bhatia
ECE, UIUC
Title:
An Investigation of Waffle Structure ESD Protection Diodes
Abstract:
Electrostatic discharge (ESD) events pose serious reliability issues to
state-of-the-art integrated circuits. As device feature sizes shrink,
dangerously high electric fields and current densities, due to ESD events, are
more frequently encountered in silicon ICs, causing gate oxide breakdown and
thermal damage in the metal interconnect and silicon. Without ESD protection
strategies, integrated circuit yield drops significantly, thereby increasing
manufacturing cost and negatively impacting reliability. A basic overview of
ESD phenomena and protection topologies will be presented. In this talk,
we focus on the optimization of ESD protection diodes, which are commonly used
in RF I/Os due to their minimal capacitance contribution to the signal
paths. Theoretically, diodes with a maximized ratio of perimeter to area
will have a maximized figure-of-merit, It2/C (ESD failure current per unit
capacitance). This motivates the use of small, square diodes, connected in a
waffle configuration. Waffle diodes have been evaluated in this work, along
with a high-level metal routing methodology that is intended to minimize capacitance.
In addition, a short presentation of an ESD-protected, Ultra-Wideband LNA
design will be given (time permitting). Ultra-Wideband (UWB) is a new wireless
standard, designed to transmit information at high data rates while consuming
little power. UWB receivers must incorporate an LNA that exhibits uniform gain
and low noise figure across the entire band. For UWB, this band is usually
between 3.1 and 10.6GHz. In addition, good linearity is needed to handle strong
interferers at the 802.11a band, and the LNA S11 must be less than -10dB across
the band. This objective is especially difficult to meet at the upper
frequencies with the presence of an ESD protection circuit at the input, due to
the shunt capacitance added to the signal path. In this talk, we present two
versions of an ESD-protected, wideband LNA designed in
a 0.18µm SiGe BiCMOS
technology. The first version utilizes only one inductor, while the second
version uses no inductors in order to minimize die area. The one-inductor
design achieves high S21 (17-19dB) and low NF (4-5dB) from 3 to 10 GHz, while
maintaining S11 < 10dB and consuming 3.65mW of power.
Biography:
Karan Bhatia is currently a M.S. candidate in the
Electrical and Computer Engineering Department at the