Speaker:
Dr. Steven Voldman
IBM Microelectronics
Title:
Advancements in CMOS Latchup
Abstract:
CMOS Latchup was a semiconductor reliability mechanism
that almost prevented the mainstream integration of CMOS technology. With the effort in CMOS Latchup learning and the technology solutions installed in
the early 1980s and 1990s, CMOS became a mainstream semiconductor technology,
with CMOS latchup becoming a minor concern....But, no
new solutions have been added to CMOS technology beyond the 0.25 um technology
generation. As a result, the scaling of CMOS technology has lead to a return of
the CMOS Latchup issue for the 0.18, 0.13, 0.09 and 0.065
um technology generations in some technology applications. In this talk, advancements in the field
of CMOS latchup will be shown. BiCMOS SiGe technology will be used to demonstrate new process solutions
for improvement of latchup: heavily doped buried
layers, subcollectors, deep trench, and trench
isolation. Additionally, the Cable discharge
event (CDE) issue and the latchup domino effect will
be discussed.
Biography: